1. Field
The following description relates to frame synchronization in a communication network, and more particularly, to a method, an apparatus, and a system to configure or construct a preamble for frame synchronization and a method, an apparatus, and a system to synchronize the frame in a communication network.
2. Description of Related Art
In communication systems, frame synchronization is an important stage to obtain timing information and marking a beginning of a data field in a given data packet. Frame synchronization is enabled by locating a preamble, which is a unique pattern of a symbol, in a frame before the data field. The preamble is known to a transmitter and a receiver prior to data transmission.
After receiving the packet, the receiver first performs frame synchronization based on information in the preamble, obtains timing information, and then recovers useful data from transmitted data in the data field. The frame synchronization is performed by correlating a received signal with a preamble template. The estimate of the timing information corresponds to a time epoch for which a maximum cross-correlation is achieved. The absence of a frame synchronization phase or the occurrence of an error in the frame synchronization will result in loss of data or packet transmission due to lack of accurate timing information.
Further, the beginning of the data field in the frame is determined as a point in time at which a cross-correlation between the transmitted data and the preamble template reaches a peak value. This is also referred to as a time epoch.
Preamble type setting adds some additional data header strings to help check the Wi-Fi data transmission errors. Short preamble type uses shorter data strings that adds less data to transmit the error redundancy check which means that it is much faster. Long preamble type uses longer data strings which allow for better error checking capability. Accuracy to estimate a correct time epoch is directly proportional to a length of a preamble sequence. In other words, longer preambles may yield more precise frame synchronization. Constructing such longer preamble sequences is complex and sometimes unfeasible. Further, the frame synchronization based on the longer preamble sequences causes high circuit and computational complexity. The computational complexity affects a processing speed and power consumption at a transceiver.